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ISL28148, ISL28248, ISL28448
Data Sheet September 21, 2010 FN6337.4
4.5MHz, Single Dual and Quad Precision Rail-to-Rail Input-Output (RRIO) Op Amps with Very Low Input Bias Current
The ISL28148, ISL28248 and ISL28448 are 4.5MHz low-power single, dual and quad operational amplifiers. The parts are optimized for single supply operation from 2.4V to 5.5V, allowing operation from one lithium cell or two Ni-Cd batteries. The single, dual and quad feature an Input Range Enhancement Circuit (IREC) which enables them to maintain CMRR performance for input voltages greater than the positive supply. The input signal is capable of swinging 0.25V above the positive supply and to 100mV below the negative supply with only a slight degradation of the CMRR performance. The output operation is rail-to-rail. The parts draw minimal supply current (900A per amplifier) while meeting excellent DC accuracy, AC performance, noise and output drive specifications. The ISL28148 features an enable pin that can be used to turn the device off and reduce the supply current to a maximum of 16A. Operation is guaranteed over -40C to +125C temperature range.
Features
* 4.5MHz gain bandwidth product * 900A supply current (per amplifier) * 1.8mV maximum offset voltage * 1pA typical input bias current * Down to 2.4V single supply operation * Rail-to-rail input and output * Enable pin (ISL28148 SOT-23 package only) * -40C to +125C operation * Pb-free (RoHS compliant)
Applications
* Low-end audio * 4mA to 20mA current loops * Medical devices * Sensor amplifiers * ADC buffers * DAC output amplifiers
Ordering Information
PART NUMBER (Note) ISL28148FHZ-T7* ISL28148FHZ-T7A* ISL28248FBZ ISL28248FBZ-T7* ISL28248FUZ ISL28248FUZ-T7* Coming Soon, ISL28448FVZ Coming Soon, ISL28448FVZ-T7* PART MARKING GABT (Note 2) GABT (Note 2) 28248 FBZ 28248 FBZ 8248Z 8248Z MXZ MXZ PACKAGE (Pb-Free) 6 Ld SOT-23 (Tape and Reel) 6 Ld SOT-23 (Tape and Reel) 8 Ld SOIC 8 Ld SOIC (Tape and Reel) 8 Ld MSOP 8 Ld MSOP (Tape and Reel) 14 Ld TSSOP 14 Ld TSSOP (Tape and Reel) PKG. DWG. # P6.064A P6.064A M8.15E M8.15E M8.118A M8.118A M14.173 M14.173
*Please refer to TB347 for details on reel specifications. NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. The part marking is located on the bottom of the part.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2007, 2008, 2010. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
ISL28148, ISL28248, ISL28448 Pinouts
ISL28148 (6 LD SOT-23) TOP VIEW
OUT 1 V- 2 IN+ 3 6 V+ 5 EN 4 INOUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +-
ISL28248 (8 LD SOIC) TOP VIEW
8 V+ 7 OUT_B 6 IN-_B 5 IN+_B
+-
ISL28248 (8 LD MSOP) TOP VIEW
OUT_A 1 IN-_A 2 IN+_A 3 V- 4 -+ +8 V+ 7 OUT_B 6 IN-_B 5 IN+_B OUT_A 1 IN-_A 2 IN+_A 3 V+ 4 IN+_B 5 IN-_B 6 OUT_B 7
ISL28448 (14 LD TSSOP) TOP VIEW
14 OUT_D -+ +13 IN-_D 12 IN+_D 11 V10 IN+_C -+ +9 IN-_C 8 OUT_C
2
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Absolute Maximum Ratings (TA = +25C)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/s Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1200V
Thermal Information
Thermal Resistance (Typical, Note 3) JA (C/W) 6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230 8 Ld SO Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 175 14 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 115 Ambient Operating Temperature Range . . . . . . . . .-40C to +125C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTE: 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25C unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. CONDITIONS ISL28148 ISL28248 and ISL28448 MIN (Note 4) -1.8 -2 -1.8 -2.8 TYP
0
PARAMETER VOS
DESCRIPTION Input Offset Voltage
MAX (Note 4) 1.8 2 1.8 2.8
UNIT mV mV V/C
0
V OS --------------T IOS IB CMIR CMRR PSRR AVOL
Input Offset Voltage vs Temperature Input Offset Current TA = -40C to +85C Input Bias Current TA = -40C to +85C Common-Mode Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain Guaranteed by CMRR VCM = 0V to 5V V+ = 2.4V to 5.5V VO = 0.5V to 4.5V, RL = 100k to VCM VO = 0.5V to 4.5V, RL = 1k to VCM -35 -80 -30 -80 0 75 70 80 75 200 150
0.03
5
35 80 30 80 5
pA pA V dB dB V/mV V/mV
1
98 98 580 50 3 50 6 8 70 110
VOUT
Maximum Output Voltage Swing
Output low, RL = 100k to VCM Output low, RL = 1k to VCM Output high, RL = 100k to VCM Output high, RL = 1k to VCM 4.994 4.99 4.93 4.89
mV mV V V
4.998 4.95 0.9 10 1.25 1.4 14 16
IS,ON IS,OFF IO+
Quiescent Supply Current, Enabled Quiescent Supply Current, Disabled Short-Circuit Output Source Current
Per Amplifier ISL28148 SOT-23 package only RL = 10 to VCM 48 45
mA A mA
75
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Electrical Specifications
V+ = 5V, V- = 0V,VCM = 2.5V, RL = Open, TA = +25C unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) CONDITIONS RL = 10 to VCM V+ to VISL28148 SOT-23 package only ISL28148 SOT-23 package only V EN = V+, ISL28148 SOT-23 package only V EN = V-, ISL28148 SOT-23 package only 1 12 2.4 2 0.8 1.5 1.6 25 30 MIN (Note 4) TYP -68 MAX (Note 4) -48 -45 5.5 UNIT mA V V V A nA
PARAMETER IOVSUPPLY VENH VENL IENH IENL
DESCRIPTION Short-Circuit Output Sink Current Supply Operating Range EN Pin High Level EN Pin Low Level EN Pin Input High Current EN Pin Input Low Current
AC SPECIFICATIONS GBW Unity Gain Bandwidth eN iN PSRR- @ 120Hz PSRR+ @ 120Hz Gain Bandwidth Product -3dB Bandwidth Input Noise Voltage Peak-to-Peak Input Noise Voltage Density Input Noise Current Density AV = 100, RF = 100k, RG = 1k, RL = 10k to VCM AV =1, RF = 0, VOUT = 10mVP-P, RL = 10k to VCM f = 0.1Hz to 10Hz fO = 1kHz fO = 1kHz VCM = 1VP-P, RL = 10k to VCM V+, V- = 1.2V and 2.5V, VSOURCE = 1VP-P, RL = 10k to VCM V+, V- = 1.2V and 2.5V VSOURCE = 1VP-P, RL = 10k to VCM 4.5 13 2 28 0.016 85 -82 -100 MHz MHz VPP nV/Hz pA/Hz dB dB dB
CMRR @ 60Hz Input Common Mode Rejection Ratio Power Supply Rejection Ratio (V-) Power Supply Rejection Ratio (V+)
TRANSIENT RESPONSE SR tr, tf, Large Signal Slew Rate Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tr, tf, Small Signal Rise Time, 10% to 90%, VOUT Fall Time, 90% to 10%, VOUT tEN AV = +2, VOUT = 3VP-P, RG = RF = 10k RL = 10k to VCM AV = +2, VOUT = 3VP-P, RG = RF = 10k RL = 10k to VCM AV = +2, VOUT = 10mVP-P, RG = RF = RL = 10k to VCM AV = +2, VOUT = 10mVP-P, RG = RF = RL = 10k to VCM
4
V/s ns ns ns ns s s
530 530 50 50 5 0.2
Enable to Output Turn-on Delay Time, 10% EN = 5V to 0V, AV = +2, EN to 10% VOUT, (ISL28148) RG = RF = RL = 1k to VCM Enable to Output Turn-off Delay Time, 10% VEN = 0V to 5V, AV = +2, EN to 10% VOUT, (ISL28148) RG = RF = RL = 1k to VCM
NOTE: 4. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested.
4
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
15 10 Rf = Rg = 100k 5 0 V+ = 5V -5 RL = 1k CL = 16.3pF -10 AV = +2 VOUT = 10mVP-P -15 100 1k 10k Rf = Rg = 10k 1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 V = 5V + -7 RL = 1k CL = 16.3pF -8 AV = +1 -9 1k 10k VOUT = 100mV VOUT = 50mV VOUT = 10mV VOUT = 1V
Rf = Rg = 1k
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR VALUES Rf/Rg
FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k
1 0 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 1k V+ = 5V RL = 10k CL = 16.3pF AV = +1 10k 100k 1M 10M 100M VOUT = 100mV VOUT = 50mV VOUT = 10mV VOUT = 1V
1 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 V+ = 5V RL = 100k CL = 16.3pF AV = +1 1k 10k 100k 1M 10M 100M VOUT = 100mV VOUT = 50mV VOUT = 10mV VOUT = 1V
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k
FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k
1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 -9 V+ = 5V VOUT = 10mVP-P CL = 16.3pF AV = +1 1k 10k 100k
70 RL = 1k 60 RL = 10k GAIN (dB) RL = 100k 50 AV = 101 40 30 AV = 10 20 10 0 1M 10M 100M -10 100 AV = 1 V+ = 5V CL = 16.3pF RL = 10k VOUT = 10mVP-P AV = 1001 AV = 1, Rg = INF, Rf = 0 AV = 10, Rg = 1k, Rf = 9.09k AV = 101, Rg = 1k, Rf = 100k AV = 1001, Rg = 1k, Rf = 1M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. GAIN vs FREQUENCY vs RL
FIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
5
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
1 0 NORMALIZED GAIN (dB) -1 -2 -3 -4 -5 -6 -7 -8 RL = 10k CL = 16.3pF AV = +1 VOUT = 10mVP-P 100k 1M FREQUENCY (Hz) 10M 100M V+ = 2.4V NORMALIZED GAIN (dB) V+ = 5V
(Continued)
-9 10k
8 7 6 5 4 3 2 1 0 -1 -2 -3 V+ = 5V -4 RL = 1k -5 A = +1 V -6 VOUT = 10mVP-P -7 -8 10k 100k
CL = 51.7pF CL = 43.7pF CL = 37.7pF
CL = 26.7pF CL = 16.7pF CL = 4.7pF
1M FREQUENCY (Hz)
10M
100M
FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
FIGURE 8. GAIN vs FREQUENCY vs CL
10 0 -10 -20 CMRR (dB) -30 -40 -50 -60 -70 -80 -90 100 1k 10k 100k FREQUENCY (Hz) V+ = 2.4V, 5V RL = 1k CL = 16.3pF AV = +1 VCM = 1VP-P 1M 10M PSRR (dB)
20 0 -20 -40 -60 -80 -100 -120 100 PSRR+ PSRR-
V+, V- = 1.2V RL = 1k CL = 16.3pF AV = +1 VCM = 1VP-P 1M 10M
1k
10k 100k FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY; V+ = 2.4V AND 5V
FIGURE 10. PSRR vs FREQUENCY, V+, V- = 1.2V
20 0 -20 PSRR (dB) -40 -60 -80 -100 -120 100 1k 10k 100k PSRR+ PSRR-
1000 INPUT VOLTAGE NOISE (nV/Hz) V+ = 5V Rf = 1k Rg = 1k AV = +2
100
V+, V- = 2.5V RL = 1k CL = 16.3pF AV = +1 VCM = 1VP-P 1M 10M
10
1
10
FREQUENCY (Hz)
100 1k FREQUENCY (Hz)
10k
100k
FIGURE 11. PSRR vs FREQUENCY V+, V- = 2.5V
FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
0.1 INPUT CURRENT NOISE (pA/Hz) V+ = 5V Rf = 1k Rg = 1k AV = +2 0 -0.5 INPUT NOISE (V) -1.0 -1.5 -2.0 -2.5 0.01 -3.0 0 RL = 10k V+ = 5V CL = 16.3pF AV = 10k Rg = 10 Rf = 100k 1 2 3 4 5 6 TIME (s) 7 8 9 10
(Continued)
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY
FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz
2.0 1.5 LARGE SIGNAL (V) SMALL SIGNAL (V) 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 0 1 2 3 V+, V- = 2.5V RL = 1k CL = 16.3pF Rg = Rf = 10k AV = 2 VOUT = 3VP-P 4 5 6 TIME (s) 7 8 9 10
0.025
0.020
0.015
V+, V- = 2.5V RL = 1k CL = 16.3pF Rg= Rf = 10k AV = 2 VOUT = 10mVP-P 0 1 2 3 4 5 TIME (s) 6 7 8 9 10
0.010
FIGURE 15. LARGE SIGNAL STEP RESPONSE
FIGURE 16. SMALL SIGNAL STEP RESPONSE
3.5 3.0 2.5 VENABLE (V) 2.0 1.5 1.0 0.5 0 -0.5 0 10 20 30 40 50 60 TIME (s) 70 80 90 V+ = 5V Rg = Rf = 10k CL = 16.3pF AV = +2 VOUT = 1VP-P RL = 10k VEN VOUT
1.2 1.0 0.8 0.6 0.4 0.2 0 -0.2 100 OUTPUT (V)
FIGURE 17. ISL28148 ENABLE TO OUTPUT RESPONSE
7
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
800 600 400 VOS (V) 200 0 -200 -400 -600 -800 -1 0 1 2 3 VCM (V) 4 5 6 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1k IBIAS (pA) 100 80 60 40 20 0 -20 -40 -60 -80 -100 -1 0 1 2 3 VCM (V) 4 5 6 V+ = 5V RL = OPEN Rf = 100k, Rg = 100 AV = +1k
(Continued)
FIGURE 18. INPUT OFFSET VOLTAGE vs COMMON MODE INPUT VOLTAGE
FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE INPUT VOLTAGE
1.2 1.1 CURRENT (mA) 1.0 MEDIAN 0.9 0.8 0.7 0.6 -40
10.5 9.5 MAX CURRENT (A) 8.5 7.5 6.5 5.5 4.5 3.5 -40 MIN MEDIAN MAX
MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 20. SUPPLY CURRENT ENABLED vs TEMPERATURE V+, V- = 2.5V
FIGURE 21. SUPPLY CURRENT DISABLED vs TEMPERATURE V+, V- = 2.5V
2.0 1.5 1.0 VOS (mV) VOS (mV) 0.5 0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 MIN MEDIAN MAX
2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 100 120 -2.0 -40 -20 0 MIN MEDIAN MAX
20 40 60 80 TEMPERATURE (C)
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 22. VOS vs TEMPERATURE VIN = 0V, V+, V- = 2.75V
FIGURE 23. VOS vs TEMPERATURE VIN = 0V, V+, V- = 2.5V
8
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
2.0 1.5 1.0 VOS (mV) IBIAS- (pA) 0.5 0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 MIN MEDIAN MAX 250 200 150 100 50 0 -50 -40 MIN MAX MEDIAN 300
(Continued)
20 40 60 80 TEMPERATURE (C)
100
120
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 24. VOS vs TEMPERATURE VIN = 0V, V+, V- = 1.2V
FIGURE 25. IBIAS- vs TEMPERATURE V+, V- = 2.5V
250 200 150 100 50 0 -50 -40 MAX MEDIAN
10 0 -10 MAX MEDIAN MIN
IBIAS- (pA)
IOS (pA)
120
-20 -30 -40 -50 -60
MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
-70 -40
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 26. IBIAS- vs TEMPERATURE V+, V- = 1.2V
FIGURE 27. IOS vs TEMPERATURE V+, V- = 2.5V
20 10 0 IOS (pA) -10 -20 -30 -40 -50 -60 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 AVOL (V/mV) MAX MEDIAN MIN 1750 1550 1350 1150 950 750 550 350 150 -40 MIN -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MAX MEDIAN
FIGURE 28. IOS vs TEMPERATURE V+, V- = 1.2V
FIGURE 29. AVOL vs TEMPERATURE RL = 100k, V+, V- = 2.5V, VO = -2V TO +2V
9
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
80 70 AVOL (V/mV) 60 50 40 30 20 -40 MAX MEDIAN 140 130 120 CMRR (dB) 110 100 90 MIN -20 0 20 40 60 80 TEMPERATURE (C) 100 120 80 70 -40 MEDIAN MAX
(Continued)
MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 30. AVOL vs TEMPERATURE RL = 1k, V+, V- = 2.5V, VO = -2V TO +2V
FIGURE 31. CMRR vs TEMPERATURE VCM = -2.5V TO +2.5V, V+, V- = 2.5V
140 130 120 PSRR (dB) MAX
4.970 4.965 MAX 4.960 VOUT (V)
110 100 MEDIAN 90 80 70 -40 MIN
4.955 MEDIAN 4.950 4.945 4.940 -40 MIN
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 32. PSRR vs TEMPERATURE V+, V- = 1.2V TO 2.75V
FIGURE 33. VOUT HIGH vs TEMPERATURE RL = 1k, V+, V- = 2.5V
4.9994 4.9992 MAX VOUT (mV) 4.9990 VOUT (V) 4.9988 4.9986 4.9984 4.9982 -40 MEDIAN MIN
75 70 65 60 MEDIAN 55 50 45 40 -40 MIN MAX
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 34. VOUT HIGH vs TEMPERATURE RL = 100k, V+, V- = 2.5V
FIGURE 35. VOUT LOW vs TEMPERATURE RL = 1k, V+, V- = 2.5V
10
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open
3.3 + OUTPUT SHORT CIRCUIT CURRENT (mA) 3.1 2.9 VOUT (mV) 2.7 2.5 2.3 MEDIAN 2.1 1.9 1.7 1.5 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN MAX 95 90 MAX 85 80 MEDIAN 75 70 MIN 65 60 -40
(Continued)
-20
0
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 36. VOUT LOW vs TEMPERATURE RL = 100k, V+, V- = 2.5V
FIGURE 37. + OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE VIN = 2.55V, RL = 10, V+, V- = 2.5V
-50 - OUTPUT SHORT CIRCUIT CURRENT (mA) -55 MAX -60 -65 -70 MIN -75 -80 -85 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MEDIAN
FIGURE 38. - OUTPUT SHORT CIRCUIT CURRENT vs TEMPERATURE VIN = -2.55V, RL = 10, V+, V- = 2.5V
Pin Descriptions
ISL28148 (6 Ld SOT-23) 4 2 (A) 6 (B) 2 (A) 6 (B) 9 (C) 13 (D) ISL28248 (8 Ld SO) (8 Ld MSOP) ISL28448 (14 Ld TSSOP) PIN NAME ININ-_A IN-_B IN-_C IN-_D FUNCTION inverting input
V+ IN-
EQUIVALENT CIRCUIT
IN+ VCircuit 1
3 3 (A) 5 (B) 3 (A) 5 (B) 10 (C) 12 (D)
IN+ IN+_A IN+_B IN+_C IN+_D
Non-inverting input
(See circuit 1)
11
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Pin Descriptions (Continued)
ISL28148 (6 Ld SOT-23) 2 ISL28248 (8 Ld SO) (8 Ld MSOP) 4 ISL28448 (14 Ld TSSOP) 11 PIN NAME VFUNCTION Negative supply
V+
CAPACITIVELY COUPLED ESD CLAMP
EQUIVALENT CIRCUIT
VCircuit 2
1 1 (A) 7 (B) 1 (A) 7 (B) 8 (C) 14 (D)
OUT OUT_A OUT_B OUT_C OUT_D
Output
V+
OUT
VCircuit 3
6 5
8
4 -
V+
EN
Positive supply Chip enable
(See circuit 2)
V+
EN
VCircuit 4
Applications Information
Introduction
The ISL28148, ISL28248 and ISL28448 are single, dual and quad channel CMOS rail-to-rail input, output (RRIO) micropower precision operational amplifiers. The parts are designed to operate from single supply (2.4V to 5.5V) or dual supply (1.2V to 2.75V). The parts have an input common mode range that extends 0.25V above the positive rail and 100mV below the negative supply rail. The output can swing within about 3mV of the supply rails with a 100k load.
behavior from typically 100mV below the negative rail and 0.25V higher than the V+ rail.
Rail-to-Rail Output
A pair of complementary MOS devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. The devices' with a 100k load will swing to within 3mV of the positive supply rail and within 3mV of the negative supply rail.
Results of Overdriving the Output
Caution should be used when overdriving the output for long periods of time. Overdriving the output can occur in two ways: 1. The input voltage times the gain of the amplifier exceeds the supply voltage by a large value or 2. The output current required is higher than the output stage can deliver. These conditions can result in a shift in the Input Offset Voltage (VOS) as much as 1V/hr. of exposure under these condition.
Rail-to-Rail Input
Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The parts achieve input rail-to-rail operation without sacrificing important precision specifications and degrading distortion performance. The devices' input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current vs the common-mode voltage range gives us an undistorted
IN+ and IN- Input Protection
All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. They also contain back-to-back diodes across the input terminals ("Pin Descriptions" table - Circuit 1 on page 11). For applications where the input differential voltage is expected to exceed
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
0.5V, an external series resistor must be used to ensure the input currents never exceed 5mA (Figure 39). visible distortion occurs on the input and output signals. To avoid this issue, keep the input slew rate below 4.8V/s, or use appropriate current limiting resistors. Large (>2V) differential input voltages can also cause an increase in disabled ICC.
VIN RIN + RL VOUT
Using Only One Channel
If the application does not use all channels, then the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 40).
FIGURE 39. INPUT CURRENT LIMITING
Enable/Disable Feature
The ISL28148 offers an EN pin that disables the device when pulled up to at least 2.0V. In the disabled state (output in a high impedance state), the part consumes typically 10A at room temperature. By disabling the part, multiple ISL28148 parts can be connected together as a MUX. In this configuration, the outputs are tied together in parallel and a channel can be selected by the EN pin. The loading effects of the feedback resistors of the disabled amplifier must be considered when multiple amplifier outputs are connected together. Note that feed-through from the IN+ to IN- pins occurs on any Mux Amp disabled channel where the input differential voltage exceeds 0.5V (e.g., active channel VOUT = 1V, while disabled channel VIN = GND), so the mux implementation is best suited for small signal applications. If large signals are required, use series IN+ resistors, or large value RF, to keep the feed-through current low enough to minimize the impact on the active channel. See "Limitations of the Differential Input Protection" on page 13 for more details.The EN pin also has an internal pull-down. If left open, the EN pin will pull to the negative rail and the device will be enabled by default. When not used, the EN pin should either be left floating or connected directly to the V- pin.
+
FIGURE 40. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input impedance and low offset voltage, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 41 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted to the PC board using Teflon standoff insulators.
.
Limitations of the Differential Input Protection
If the input differential voltage is expected to exceed 0.5V, an external current limiting resistor must be used to ensure the input current never exceeds 5mA. For non-inverting unity gain applications the current limiting can be via a series IN+ resistor, or via a feedback resistor of appropriate value. For other gain configurations, the series IN+ resistor is the best choice, unless the feedback (RF) and gain setting (RG) resistors are both sufficiently large to limit the input current to 5mA. Large differential input voltages can arise from several sources: * During open loop (comparator) operation. Used this way, the IN+ and IN- voltages don't track, so differentials arise. * When the amplifier is disabled but an input signal is still present. An RL or RG to GND keeps the IN- at GND, while the varying IN+ signal creates a differential voltage. Mux Amp applications are similar, except that the active channel VOUT determines the voltage on the IN- terminal. * When the slew rate of the input pulse is considerably faster than the op amp's slew rate. If the VOUT can't keep up with the IN+ signal, a differential voltage results, and 13
HIGH IMPEDANCE INPUT IN
V+
FIGURE 41. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER
Current Limiting
These devices have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device.
FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 1:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 1)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage (Magnitude of V+ and V-) * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated as shown in Equation 2:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------RL (EQ. 2)
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Package Outline Drawing
P6.064A
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 0, 2/10
1.90 0.95 D A 6 5 4 0-3 0.08-0.20
PIN 1 INDEX AREA 2.80 3 1.60 3 0.15 C D 2x 5
(0.60) 1 2 3 0.20 C 2x 0.40 0.05 3 D END VIEW SEE DETAIL X
B
0.20 M C A-B TOP VIEW
2.90
5
0.15 C A-B 2x
10 TYP (2 PLCS)
H
1.14 0.15 C
1.45 MAX
SIDE VIEW
0.05-0.15
0.10 C
SEATING PLANE
(0.25) GAUGE PLANE
DETAIL "X" (0.60)
0.450.1
4
(1.20)
NOTES: (2.40) 1. 2. 3. 4. 5. (0.95) (1.90) TYPICAL RECOMMENDED LAND PATTERN 6. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y14.5M-1994. Dimension is exclusive of mold flash, protrusions or gate burrs. Foot length is measured at reference to guage plane. This dimension is measured at Datum "H". Package conforms to JEDEC MO-178AA.
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09
4 4.90 0.10 A DETAIL "A" 0.22 0.03
B
6.0 0.20 3.90 0.10 4 PIN NO.1 ID MARK 5 (0.35) x 45 1.27 0.43 0.076 0.25 M C A B 4 4
SIDE VIEW "B" TOP VIEW
1.75 MAX
1.45 0.1 0.25 0.175 0.075 GAUGE PLANE C SEATING PLANE 0.10 C
SIDE VIEW "A
0.63 0.23
DETAIL "A"
(1.27) (0.60)
NOTES: (1.50) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. Unless otherwise specified, tolerance : Decimal 0.05 Dimension does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. 5. 6. The pin #1 identifier may be either a mold or mark feature. Reference to JEDEC MS-012.
2. (5.40) 3. 4.
TYPICAL RECOMMENDED LAND PATTERN
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP) Rev 0, 9/09
A 3.00.1 8 0.25 CAB
3.00.1
4.90.15
DETAIL "X"
1.10 Max PIN# 1 ID 1 2 0.65 BSC TOP VIEW B SIDE VIEW 2
0.18 0.05
0.95 BSC
0.860.09 H C SEATING PLANE 0.33 +0.07/ -0.08 0.08 C A B SIDE VIEW 1 0.10 0.05 0.10 C
GAUGE PLANE
0.25
33 0.55 0.15 DETAIL "X"
5.80 4.40 3.00
NOTES: 1. 2. 3. Dimensions are in millimeters. Dimensioning and tolerancing conform to JEDEC MO-187-AA and AMSE Y14.5m-1994. Plastic or metal protrusions of 0.15mm max per side are not included. Plastic interlead protrusions of 0.25mm max per side are not included. Dimensions "D" and "E1" are measured at Datum Plane "H". This replaces existing drawing # MDP0043 MSOP 8L.
0.65 0.40 1.40 TYPICAL RECOMMENDED LAND PATTERN 5. 6. 4.
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FN6337.4 September 21, 2010
ISL28148, ISL28248, ISL28448 Thin Shrink Small Outline Plastic Packages (TSSOP)
N INDEX AREA E E1 -B1 2 3 0.05(0.002) -AD -CSEATING PLANE A 0.25 0.010 L 0.25(0.010) M GAUGE PLANE BM
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A A1 A2 b c D MIN 0.002 0.031 0.0075 0.0035 0.195 0.169 MAX 0.047 0.006 0.041 0.0118 0.0079 0.199 0.177 MILLIMETERS MIN 0.05 0.80 0.19 0.09 4.95 4.30 MAX 1.20 0.15 1.05 0.30 0.20 5.05 4.50 NOTES 9 3 4 6 7 8o Rev. 2 4/06
e
b 0.10(0.004) M C AM BS
A1 0.10(0.004)
A2 c
E1 e E L N
0.026 BSC 0.246 0.0177 14 0o 8o 0.256 0.0295
0.65 BSC 6.25 0.45 14 0o 6.50 0.75
NOTES: 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AC, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E1" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of "b" dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. (Angles in degrees)
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6337.4 September 21, 2010

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